The Iron Album

Vendor	Model	Model name	Chipset	Host bus	Interface	Attachment
Sun	501-2741	SunSwift UltraSCSI PCI Adapter 1.0, 10/100BaseT	DEC 21152-AA + QLogic ISP1040B + Sun STP2003QFP + NS DP83840AVCE-1 + NS DP83223V	PCI 32/33	Ultra Wide SCSI	External: HD68
Sun	501-2741	SunSwift UltraSCSI PCI Adapter 1.0, 10/100BaseT		PCI 32/33	Fast Ethernet	TP RJ45: 10Base-T, 100Base-TX

lspci

00:0c.0 PCI bridge: Digital Equipment Corporation DECchip 21152 (rev 02) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 32, Cache Line Size: 32 bytes
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
	I/O behind bridge: 0000a000-0000afff
	Memory behind bridge: dd800000-dfffffff
	Prefetchable memory behind bridge: 00000000e4f00000-00000000e7efffff
	Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
	BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-

01:00.0 Bridge: Sun Microsystems Computer Corp. EBUS (rev 01)
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 32 (2500ns min, 6250ns max), Cache Line Size: 32 bytes
	Interrupt: pin A routed to IRQ 11
	Region 0: Memory at df000000 (32-bit, non-prefetchable) [size=16M]
	Region 1: Memory at de800000 (32-bit, non-prefetchable) [size=8M]
	Expansion ROM at <unassigned> [disabled] [size=16M]

01:00.1 Ethernet controller: Sun Microsystems Computer Corp. Happy Meal (rev 01)
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 32 (2500ns min, 1250ns max), Cache Line Size: 32 bytes
	Interrupt: pin B routed to IRQ 10
	Region 0: Memory at de000000 (32-bit, non-prefetchable) [size=32K]
	Expansion ROM at e5000000 [size=16M]

01:04.0 SCSI storage controller: QLogic Corp. ISP1020 Fast-wide SCSI (rev 05)
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 32, Cache Line Size: 32 bytes
	Interrupt: pin A routed to IRQ 11
	Region 0: I/O ports at a800 [size=256]
	Region 1: Memory at dd800000 (32-bit, non-prefetchable) [size=4K]
	Expansion ROM at <unassigned> [disabled] [size=64K]

00:0c.0 0604: 1011:0024 (rev 02)
00: 11 10 24 00 07 00 80 02 02 00 04 06 08 20 01 00
10: 00 00 00 00 00 00 00 00 00 01 01 20 a1 a1 80 22
20: 80 dd f0 df f1 e4 e1 e7 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04 00

01:00.0 0680: 108e:1000 (rev 01)
00: 8e 10 00 10 16 00 80 02 01 00 80 06 08 20 80 00
10: 00 00 00 df 00 00 80 de 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 0a 19

01:00.1 0200: 108e:1001 (rev 01)
00: 8e 10 01 10 16 00 80 02 01 00 00 02 08 20 80 00
10: 00 00 00 de 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 01 00 00 e5 00 00 00 00 00 00 00 00 0a 02 0a 05

01:04.0 0100: 1077:1020 (rev 05)
00: 77 10 20 10 17 00 00 02 05 00 00 01 08 20 00 00
10: 01 a8 00 00 00 00 80 dd 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00